The present invention relates to digital decoding techniques, and more particularly, to a system and technique for comparing digital addresses or data to determine their position within a range or multiple ranges within a digital memory.
In digital systems, it is often desirable to know when a particular location has been addressed within memory. In computer programming and debugging systems in particular, data is often stored in particular areas of a memory device and the addressing of those areas at appropriate times is a very good indication that the computer system is properly operating. If the hardware or programming for some reason is not operating correctly, or there is a software error which has previously not been detected, the system may address a particular location (address) in memory within a range of addresses at a time when it should not have occurred. If this is detected, the signal can be used to advise an operator that an error has occurred.
The ability to determine computer addressing with respect to a particular range of addresses can be used to accomplish a variety of tasks in computer operation and development systems. By way of example, such indications may be employed to accomplish write protection, and to protect inadvertent addressing of memory areas specifically designated as read-only. If any address within a read-only memory, for example, is selected during computer operation, (by comparison of the selected address with the range of addresses defining the protected memory area), the computer can be stopped and a signal generated so that an operator might quickly determine why and at what point in the program of operation the machine or software error occurred.
In other instances, the knowledge of the range of any address selected may be used to indicate a software error or system error when the machine operates in a memory area defined by ranges outside of the one in which it should be during any time period. If the computer begins addressing memory locations at other than the appropriate ranges, a software error or signal flag can be provided. This again allows an operator to check the programming to determine why an error occurred.
In still other instances, systems often include multiple coupled machines which transfer, read, and exchange data from the same memory areas at different times. When such multiple addressing occurs, it is often desirable to know which machine is addressing particular memory locations at any given time. Again, this is necessary to control the access of the multiple machines and to determine if the proper machines are addressing the proper memory locations in accordance with that program control. Accordingly, if the selected addresses are compared with those addresses defining the memory ranges at any given time, the proper operation of the entire system can be followed and confirmed, or an error signal can be provided if an improper range is addressed by any of the multiple machines.
In yet other instances, the computer programming may include different loops which provide machine control. Commonly, the machine will operate within a specific loop for a given period of time before returning and following other branches of a program. It is often important to determine when the computer exits a specific address area defining the loop, so that a loop exit signal can be generated to signify the end of the loop or subroutine. Again, by making a comparison of the addresses selected during the operation of a loop, an operator can determine when the machine addresses other than the specific range of memory locations defining the loop.
In order to obtain the desired result in all of the above instances, each address selected by the computer during its operation must be compared with the end points of a given range of addresses to determine whether the selected address is inside, outside, or at an end point of that range. In the prior art, such comparisons have usually been made by using multiple comparator circuits which individually compare each selected address with the fixed end points of the range. In this manner, a signal can be generated to indicate whether the selected address is less than, equal to, or greater than the two end points. These signals can then be coupled to appropriate decoding circuitry and an output provided when a match occurs for the appropriately selected criteria. In implementing such a scheme, however, much hardware is required to store the particular end points of a range and to compare those end points with all digital addresses. In addition, as the number of bits in each address increases, so does the need for more hardware to make the required comparisons and decoding. Naturally, such increased hardware increases the cost and complexity of the system.
Accordingly, the present invention has been developed to overcome the specific shortcomings of the above known and similar techniques, and to provide a multirange comparison system and technique for enabling a simplified determination of the position of digital addresses or data with respect to a particular range of addresses or data.